1. Field of the Invention
The invention relates to a thin-film transistor, a thin-film transistor manufacturing apparatus, and a method for manufacturing a thin-film transistor, and more particularly it relates to a thin-film transistor and a method for manufacturing a thin-film transistor wherein it is possible to accurately and efficiently position constituent elements of a semiconductor device, and to an electronic apparatus using a thin-film transistor such as an image sensor or an LCD display.
2. Description of the Related Art
In the past, amorphous silicon thin-film transistors (TFTs) are known as being used as semiconductor devices in input and output apparatuses of contact-type image sensors.
In recent year, an increase in the amount of information and the resultant demand for high resolution and high performance from compact, lightweight portable terminals has focused attention on the polysilicon thin-film transistors. A polysilicon thin-film transistor has higher mobility than an amorphous thin-film transistor, and enables peripheral drive circuitry to be fabricated on one and the same substrate.
The manufacturing processes used for polysilicon thin-film transistors can be classified as high-temperature polysilicon, manufactured at the highest temperatures, and low-temperature polysilicon. High-temperature polysilicon involve process temperatures exceeding 1000° C., and low-temperature polysilicon involve process temperatures below approximately 600° C.
In contrast to high-temperature polysilicon, the manufacturing of which requires the use of a high-cost fused silica substrate having a high distortion point, low-temperature polysilicon can be manufactured using a low-cost alkaline glass having a low distortion point.
This is because by using an excimer laser method to crystallize the silicon film that serves as the activated layer, it is possible to achieve a low-temperature process. It is possible to form a high-performance transistor in this manner on a low-cost glass substrate. In crystallizing a silicon thin film, it is generally necessary to use energy of approximately 200 to 500 mJ/cm2 per pulse.
At this level of illumination, in order to illuminate an entire substrate ensuring approximately 400 by 500 mm, it is necessary to have a unit pulse intensity of approximately 1 kJ/pulse, and practical laser light sources have an intensity of 1 J/pulse.
Therefore, laser crystallization is performed by sequential scanning of a beam formed on an area measuring approximately 150 by 0.4 mm, in which case, the existence of an intensity profile across the beam causes variations in the crystallized polysilicon film, particularly in the scanning direction.
One method that can be envisioned for solving this problem is that of shining the laser light locally. For example, considering the case in of a LCD display apparatus incorporating an integrated drive circuit, the region that requires a high-performance thin-film transistor is only the region of the drive circuit. Thus, it is sufficient to shine the laser locally on only the drive circuit region.
A method such as noted above is disclosed in the Japanese Unexamined Patent Publication (KOKAI) No. 9-246564 and the Japanese Unexamined Patent Publication (KOKAI) No. 62-109026. According to the Japanese Unexamined Patent Publication (KOKAI) No. 9-246564 in particular, a liquid-crystal display device is manufactured, wherein a semiconductor layer in the drive circuit region is exposed to laser light, so as to form a polysilicon thin-film transistor by localized crystallization, and an amorphous thin-film transistor is formed in a pixel-switching region.
In the Japanese Unexamined Patent Publication (KOKAI) No. 7-193247 there is a disclosure of a method for exposing a region in which an element is formed by only the uniform part of the beam profile.
In this method, after laminating a semiconductor layer and an oxide film in a planar thin-film transistor and forming an alignment mark on for laser exposure on the oxide film upper layer, on the uniform beam profile part of a beam is shined onto the element formation region, using this alignment mark as a reference.
The method of using an alignment mark as a guide has the advantage of good positioning accuracy. This advantage is suitable for use in local laser exposure, as advances are made in the density and compactness of transistors.
In the technology disclosed in the Japanese Unexamined Patent Publication (KOKAI) No. 7-193247, however, it is necessary to have separate patterning process steps for form the alignment mark, these being divided into exposure, developing, etching, resin peeling, and washing process steps, and the need to have an added lithography mask just for the purpose of forming the alignment mark.
Additionally, it is necessary to have a final step of removing the oxide film that serves as the alignment mark, using a wet process.
For this reason, impurities can become attached to the surface of the crystallized silicon film, leading to a worsening of element characteristics. In this type of process, the increase in the number of process steps not only lowers the throughput, but also has the problem of only enabling the achievement of a transistor with worsened characteristics, caused by contamination and the like.
In addition to the above-noted related art, in the Japanese Unexamined Patent Publication (KOKAI) No. 9-191114, there is a disclosure of a conventional method of manufacturing a thin-film transistor, although there is no disclosure of the manufacturing of a thin-film transistor using an alignment mark.
In the Japanese Unexamined Patent Publication (KOKAI) No. 10-41523, while there is disclosure of a method for manufacturing an insulated-gate semiconductor device using a self-alignment method, there is no disclosure of a method for manufacturing of a thin-film transistor using an alignment mark.
Additionally, in the Japanese Unexamined Patent Publication (KOKAI) No. 11-87729, while there is a description of a method for manufacturing a semiconductor device using a semiconductor layer in a channel region that is laser annealed, there is no disclosure of a method for manufacturing of a thin-film transistor using an alignment mark
In Japanese Patent No. 2734359, while there is a language describing a method for manufacturing a thin-film transistor having a step of forming a protective film is formed after formation of an activated layer and forming an alignment mark on the protective film, a step of using the alignment mark formed on the protective film to crystallize the activated layer, and then a step of removing the alignment mark along with the protective film, because separate steps are used to form the alignment mark and form the protective film, in addition to an increase in the number of process steps, when forming other constituent elements of the semiconductor device it is necessary to form yet another alignment mark, thereby rendering the process uneconomical.
Accordingly, in order to solve the problems presented by the above-noted drawbacks in the related art, it is an object of the present invention to provide thin-film transistor and manufacturing apparatus and method for same, wherein in a manufacturing step for a thin-film transistor or for an electronic apparatus using a thin-film transistor requiring alignment when performing laser exposure for localized crystallization of a semiconductor layer, the number of process steps thereof is not increased and the throughput thereof is high. It is a further object of the present invention to provide an electronic apparatus using a thin-film transistor such as an image sensor or a liquid-crystal display apparatus.